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http://ipicyt.repositorioinstitucional.mx/jspui/handle/1010/1080| Fixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions | |
| GERARDO ESCOBAR VALDERRAMA RAYMUNDO ENRIQUE TORRES OLGUIN MISAEL FRANCISCO MARTINEZ MONTEJANO | |
| Acceso Abierto | |
| Atribución-NoComercial-SinDerivadas | |
| G01R25/00 G06F19/00 H03L7/08 | |
| "The present invention relates to a system to implement a phase-locked loop (PLL) which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates." | |
| 2010-05 | |
| Patente | |
| Público en general | |
| CIENCIAS FÍSICO MATEMÁTICAS Y CIENCIAS DE LA TIERRA | |
| Aparece en las colecciones: | Patentes |
Cargar archivos:
| Fichero | Tamaño | Formato | |
|---|---|---|---|
| US7720623B2.pdf | 1.08 MB | Adobe PDF | Visualizar/Abrir |